1. Field of the Invention
The present invention relates to systems and techniques for determining write patterns for maskless-lithography processes that use write devices and mask patterns for lithography processes that use photo-masks.
2. Related Art
Lithography processing represents an essential technology for manufacturing Integrated Circuits (IC) and Micro Electro-Mechanical Systems (MEMS). Lithographic techniques are used to define patterns, geometries, features, shapes, etc. onto an integrated-circuit die, semiconductor wafer, or chips, where the patterns are typically defined by a set of contours, lines, boundaries, edges, curves, etc., which generally surround, enclose, and/or define the boundary of the various regions which constitute the patterns.
One existing lithographic technique is photolithography, in which images defined by photo-masks are printed onto the integrated-circuit die or the semiconductor wafers. Furthermore, another existing lithographic technique is maskless lithography, in which a write device directly prints a write pattern onto the integrated-circuit die or the semiconductor wafers, thereby eliminating the need for photo-masks. Unfortunately, it is increasingly difficult to determine the write patterns, or to design and manufacture photo-masks.
In particular, demand for increased density of features on the integrated-circuit die and semiconductor wafers has resulted in the design of circuits with decreasing minimum dimensions. These trends have significantly increased the complexity of the computations necessary to determine the write patterns and/or the mask patterns (to which the photo-masks correspond), with a commensurate impact on computation time, processing requirements, and expense.
Furthermore, due to the wave nature of light, as dimensions approach sizes comparable to the wavelength of the light used in the photolithography processes, the resulting wafer patterns deviate from the corresponding photo-mask patterns and are accompanied by unwanted distortions and artifacts. Existing techniques (such as optical proximity correction or OPC, and resolution enhancement technologies or RET) are used to pre-distort the mask patterns to improve resolution and/or to improve a process window (i.e., a range of process conditions that result in acceptable yield) in a photolithography process.
While these techniques may ensure that the wafer pattern is printed more accurately, determining the pre-distorted mask patterns is increasingly difficult, thereby exacerbating the computational complexity and the associated problems. For example, computing the pre-distorted mask patterns may be complicated by the presence of multiple potential solutions (such as local minima) in a higher-dimensional solution space. Moreover, while many of these solutions may produce similar wafer patterns, it may be easier to manufacture photo-masks corresponding to some of the solutions than others. Consequently, identifying a suitable pre-distorted mask pattern may be time-consuming and expensive.
Moreover, many of the mask patterns and/or write patterns determined using existing techniques include one or more regions (which are sometimes referred to as hotspots) that violate pre-determined rules associated with the lithographic and/or photolithographic processes. As the density of features increases, it is increasingly difficult to correct the hotspots (so that these regions comply with the pre-determined rules) using existing techniques.
Hence, what is needed is a method and an apparatus that facilitates determination of write patterns and mask patterns without the above-described problems.